1. Field of the Invention
The present invention relates to an operating method of a semiconductor etcher, and more particularly, to an operating method in which a time for warming up the semiconductor etcher is reduced, thereby allowing the semiconductor etcher to etch wafers more rapidly.
2. Description of the Prior Art
Technologies used for semiconductor etchers can be roughly divided into two groups, dry etching technology and wet etching technology. Compared to semiconductor etchers using the wet etching technology, the dry etching technology can be controlled appropriately during an etching process, and patterns on an optical resistor can be very accurately transferred to wafers. As a result, dry etching technology for semiconductor etchers is more suitable for manufacturing of very large scale integrated circuits (VLSI) and ultra large scale integrated circuits (ULSI).
Dry etching technology takes advantage of a radio frequency power source to generate plasmas, leading to glow discharges, and producing reactive materials for etching wafers, according to initial settings.
Semiconductor etchers adopt plasmas for etching because plasmas provide a unique and a controllable energy form that can fit into small spaces used in semiconductor manufacturing processes. The plasmas can be produced by interaction from different energy forms. In semiconductor manufacturing, the plasmas are produced by energy from an electric field of a magnetic field, so that kinetic energy of electrons is enough to overcome needed energy for ionization.
Please refer to FIG. 1. FIG. 1 is a diagram of a prior art transformer coupled plasma (TCP) semiconductor etcher 10. The semiconductor etcher 10 comprises a bottom substrate 12, a side wall 14, a top substrate 16, and a vacuum room 17 enclosed by the bottom substrate 12, the side wall 14 and the top substrate 16. The semiconductor etcher 10 further comprises an induction coil 18 set above the top substrate 16, a dielectric board 19 set between the induction coil 18 and the top substrate 16, a wafer supporting frame 22 for supporting a wafer during an etching process, a radio frequency power source 24 set within the induction coil 18, and a bias source 26 electrically connected to the wafer supporting frame 22. When air is transmitted into the vacuum room 17, the air is ionized to produce plasmas that are used in an etching process.
When the etcher 10 is switched on, the radio frequency power source 24 provides constant power to the etcher 10 for performing a warm-up process over a determined period of time. Then, the radio frequency power source 24 provides the same constant power to the etcher 10 when performing an etching process. In the prior art, because the provided power is the same for both the warm up process and the etching process, the etcher 10 needs a long period of warm up time.
Magnitude of the provided power during the warm up process can affect a period of time of the etcher achieving initialization. If the warm up time is not enough to continue to perform the etching process, electric characteristics are different between a pre-over wafer and a post-over wafer after the etching process. This is called characteristic drift.
Please refer to FIG. 1, FIG. 2 and FIG. 3. FIG. 2 is a relationship diagram of an etching rate to time when a semiconductor etcher 10 is switched on as shown in FIG. 1. FIG. 3 is a diagram of provided power and time in each operating step 30 when a semiconductor etcher is switched on as shown in FIG. 1.
As FIG. 3 shows, when the etcher 10 is switched on, the etcher 10 performs a warm up process 32 that provides a time interval 840 seconds and power 800 watts, then performs a cleaning process 36 that provides a time interval 60 seconds and power 800 watts, and finally performs an etching process 34 to provide a time interval 210 seconds and power 600xcx9c700 watts. As transverse dotted lines show in FIG. 2, after passing through a time point 24, an etched wafer of the etcher 10 falls on a required range and cannot have characteristic drift. In semiconductor manufacturing, much time is wasted performing the warm-up process.
It is therefore a primary objective of the present invention to provide an operating method that lowers a warm-up time for a semiconductor etcher, thereby increasing a number of wafers the semiconductor etcher can etch in a given period of time.
The present invention discloses an operating method of a semiconductor etcher comprising the following steps. First, provide a first power for shortening warm-up time of the etcher. Next, provide a second power, which is lower than the first power, to perform an etching process. Then, provide a third power, which is between the first and second power, for cleaning the etcher.
It is an advantage of the present invention that the present operating method of the semiconductor etcher provides a shorter warm up time and higher processing efficiency.
These and other objectives and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.